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Vector Control Development Kit
User Manual
17
of the cable is properly aligned with DBG connector pin 1 (C_P18) of
the development kit (see Figure 11 on page 24).
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In ZDS II (Project > Settings... > Debugger tab), verify that
DemoApp is selected as the target and that USBSmartCable is the
selected debug tool. Verify that the serial number for the USB
Optoisolator Smart Cable interface is selected and configured using
the Setup button under the Debug Tool selection field.
Ensure that the project builds with no errors. To do so, select Rebuild
All from the Build menu and view the build results in the Output win-
dow’s Build tab.
Verify that the development board is not currently running any
code—the motor should not be spinning.
Try reloading the sample project as described in “Downloading and
Running the Sample Demonstration Code” on page 12.
If you perform these steps and cannot get the demonstration code to run,
contact ZiLOG Technical Support at www.ZiLOG.com.
Theory of Operation
In this application, the FMC16100 microcontroller ’s PWM module is
configured as three complementary output pairs. Each output pair con-
trols one complementary source/drain transistor pair in the inverter
bridge. The PWM module is configured to insert a 0.6 μS dead band
between ON states to prevent leakage that might occur if one transistor in
a pair turns on before the other is fully off.
Each PWM output pair produces a stream of complementary on/off pulses
to activate the corresponding source or drain transistor in the inverter
bridge. The voltage of each bridge output varies with the source/drain
pulse duty cycle.
UM021402-0407
Downloading and Running the Sample
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